1. Field of Invention
The present invention relates to capacitor structures, and more particularly to such structures for use in voltage regulators.
2. Related Art
In electronic circuits, when a constant voltage is required by an electronic device, the power supply must be able to provide a regulated supply voltage from a variable voltage source, such as a battery. Various types of such voltage regulators are well known in the art. For example, FIG. 1 shows one type of voltage regulator 10, utilizing a capacitor divider circuit. Voltage regulator 10 includes two capacitors C1 and C2 connected in series with a high voltage source V.sub.pp which is to be regulated. A divided voltage V.sub.div, taken between capacitors C1 and C2 at node A, is used as one input to an operational amplifier (op amp) 11, with the other input being a reference voltage V.sub.ref. Op amp 11 compares the two voltages V.sub.div and V.sub.ref and outputs a difference signal to a pass transistor 12 to regulate voltage V.sub.pp.
V.sub.pp can be determined precisely using conservation of charge, as follows. At time t=0, NMOS pass transistors 13 and 14 are turned on by setting initialization signal INIT high, and PMOS transistor 15, whose N-well is connected to V.sub.pp (not shown), is turned off by setting voltage V.sub.cc high. As a result, V.sub.div at node A is pulled to ground by NMOS transistor 13, and the voltage at node B is pulled to V.sub.ref by NMOS transistor 14. Thus, the initial charge Q.sub.i stored at node A is given by EQU Q.sub.i =(0-V.sub.ref)c.sub.1 +0*c.sub.2 =-c.sub.1 V.sub.ref(1)
After initialization or pre-charge, signal INIT is turned off, thereby turning off NMOS transistors 13 and 14. The voltage at node A, V.sub.div, rises to V.sub.ref, while the voltage a t node B goes to V.sub.pp. Thus, the final charge Q.sub.f is given by EQU Q.sub.f =(V.sub.ref -V.sub.pp)c.sub.1 +V.sub.ref c.sub.2 (2)
Equating equations (1) and (2) and solving for V.sub.pp yields EQU V.sub.pp =V.sub.ref (2+c.sub.2 /c.sub.1) (3)
Consequently, V.sub.pp can be obtained precisely according to equation (3), provided that capacitors C1 and C2 have capacitances independent of the voltage across the capacitors.
However, capacitors C1 and C2 are typically conventional N-well MOS structures, whose capacitance depends on the state of the semiconductor surface, i.e., whether the MOS capacitor is in an accumulation, depletion, or inversion state. FIG. 2 shows a typical curve representing the capacitance of an N-well MOS capacitor as a function of the voltage across the capacitor or gate-to-substrate voltage V.sub.gs. As seen from FIG. 2, for positive V.sub.gs, capacitance is essentially voltage-independent when V.sub.gs exceeds a certain positive voltage V.sub.a, corresponding to the device being in a strong accumulation state.
Accordingly, because the bias voltage or V.sub.gs for capacitor C2 is initially zero (since V.sub.div is initially zero volts), capacitor C2 is not yet in this strong accumulation state, and thus capacitance c.sub.2 is still voltage dependent. As a result, the accuracy of regulating voltage V.sub.pp decreases. Therefore, it is desirable to have a capacitor structure, for use in a voltage regulator, that exhibits a constant capacitance even at a zero bias voltage level.